| Press Releases |
| Javelin Design Automation And IMEC Extend Javelin PathFinding Design Technology For 3D Stacked ICs Javelin Design Automation, the leading provider of PathFinding solutions, announces a revolutionary solution for the rapid design exploration and optimization of three dimensional stacked ICs (3D SIC). Developed in close collaboration with IMEC, Europe's leading independent nanoelectronics research center, and Qualcomm, a partner in IMEC’s 3D integration program, 3D PathFinding extends the Javelin PathFinding methodology and j360 Silicon PathFinder™ platform to support virtual chip design for co-optimization of system design and 3D interconnect-packaging technologies. Click here to download the pdf
Javelin Design Automation Unveils j360™ With TrueFit™, TruePlan™ And TruePro™ June 30th, 2008: The First Specification-Driven Floorplanning And Prototyping Platform For Early Design Feasibility And Superior QoR. J360 enables Business Users, Architects, RTL Designers And Chip Integrators To Quickly Develop Complex, High-Performance, Low-Power SoC Designs In Parallel. The First Specification-Driven Floorplanning And Prototyping Platform For Early Design Feasibility And Superior QoR
Javelin Announces System Physical Prototyping™ July 10, 2006: Javelin Design Automation Emerges from Stealth to Introduce System Physical Prototyping™ for Evaluating Architecture tradeoffs and Logic Feasibility Based on Physical Effects Click here to download the pdf
Virtual prototype revived |